In the field of digital logic, extensive use is made of well known and highly developed complimentary metal-oxide semiconductor (CMOS) technology. As CMOS has begun to approach maturity as a technology, there is an interest in alternatives that may lead to higher performance in terms of speed, power dissipation computational density, interconnect bandwidth, and the like. In some implementations, as an alternative to CMOS technology, single flux quantum (SFQ) circuitry utilizes superconducting Josephson junctions (JJs), with typical signal power of around 4 nanowatts (nW), at a typical data rate of 20 gigabits per second (Gb/s) or greater, and operating temperatures of around 4 kelvins.
Return-to-zero (RZ) encoding describes the encoding of digital logic values as one of two values in a voltage signal such that the voltage level in the signal always returns to a low value after presenting a high value (representing a logical “1,” e.g.), even when the signal is representative of successive high values. In non-return-to-zero (NRZ) encoding, by contrast, successive logical high values are represented as a voltage signal that, aside from any negligible glitches that are more or less instantaneous, remains high until a logical low value is presented in the signal to bring the signal voltage level back to its low value. Superconducting systems in pertinent implementations of the reciprocal quantum logic (RQL) family encode a logical high digital value as a single flux quantum (SFQ) pulse of one polarity followed, within about a half a clock cycle, by a resetting SFQ pulse of the opposite polarity (e.g., a positive SFQ pulse followed by a negative SFQ pulse). A logical low digital value is encoded as the absence of an SFQ pulse.